1. Field of the Invention
The present invention relates to electrical connections for a semiconductor device made from high melting point metal and to related methods of making these connections to assure good electrical contact between interconnected semiconductor device elements.
2. Background Information
As the degree of integration of MOS integrated circuit elements increases, the area available for making electrical connections between metallic conductors and semiconductor surface regions, such as polycrystalline-silicon gate electrodes or source-drain diffused layers, is becoming extremely small. Moreover, the depth of pn junctions in surface diffused layers is becoming extremely shallow. The sputtering method, which ordinarily is used for making electrical connections to such regions, tends to produce deteriorated connections as the size of contact holes through overlying insulating layers becomes increasingly small. Frequently, metallic conductors fail to contact the surface region region at the bottom of the contact hole because of a "shadowing" effect, shown in FIG. 1, where metal deposition at the top of the sidewalls of the contact hole prevents sufficient deposition of metal at the bottom of the hole to achieve a good electrical connection with the underlying surface region. In giant LSI circuits having more than one million elements on a several millimeter square chip, such a deterioration in the electrical connections results in a substantial reduction in the reliability of the resultant device.
Growth of thin films of tungsten at the bottom of the contact hole to facilitate connection with overlying conductors may result in tungsten encroachment along the edges of the interface of the insulation layer in which the contact hole is made and the surface region to which electrical contact is to be made, resulting in degradation of device performance. This encroachment was thought to increase with temperature and partial pressure as shown in FIG. 2.
In current day 64K bit 256K bit dynamic random access MOS-type memories, the for mask matching is on the order of 0.2 .mu.m, or less than . of the minimum size of 2 to 3 .mu.m for a memory element. minimum size becomes 1 .mu.m or enters the submicron region matching precisions of less than 0.1 .mu.m will be necessary. However, since the matching precision is largely dictated b mechanical precision of the semiconductor device, a precision of 0.1 .mu.m will be difficult to achieve and will result in the following problems. First, contact hole mismatches will . in a decrease of the contact area between aluminum i ion material and the underlying surface regions to which elect contact is to be made, causing increased electrical resistance. Second, overetching during preparation of the hole will cause defects such as punctures in the interconnect areas because of the decrease in the area of the insulation film in the region surrounding the underlying source and drain regions, and will result in defective connections.
Accordingly, there exists a need for a technique to produce highly reliable electrical connections that do not significantly deteriorate the performance of semiconductor devices.